multibus processor

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美

【计】多总线处理机

Using the best connectivity bipartite graph, we also present two classes of multibus systems which have the best degree of bus fault tolerance and the best degree of bus-processor fault tolerance as well as better degree of processor fault tolerance.
然后，借助于二元图的最佳连通性，就一般情形，提出了两类多总线系统，它们具有最优总线容错度、最优混合容错度和较优处理机容错度。
This paper proposes a uniform multibus architecture, which consists of two types of nodes: the processor or computer node and the bus node.
本文提出一种面向总线的容错式多处理器或多计算机网络结构，它由处理器/计算机节点和总线节点构成。
Study of Real-Time Control System for Multibus Multiple Micro Processor
多总线多处理机实时控制系统的研究
The fault-tolerant design of multibus structure in which each processor was connected to two buses, and a new class of multibus structure with better falu-tolerant and expandability was put forward.
研究每个处理挂在两条总线上的多总线结构的容错设计问题，提出了一类新的具有较佳（最佳）容错性和可扩充性的多总线结构。